Resistive memory devices store information by controlling the resistance across each memory cell such that a read current through the memory cell in the memory device will result in a voltage drop having a magnitude that is based on the information stored in the memory cell. For example, in certain magnetic memory devices, the voltage drop across a magnetic tunnel junction (MTJ) in each memory cell can be varied based on the relative magnetic states of the magnetoresistive layers within the memory cell. In such memory devices, there is typically a portion of the memory cell that has a fixed magnetic state and another portion that has a free magnetic state that is controlled to be either parallel or antiparallel to the fixed magnetic state. Because the resistance through the memory cell changes based on whether the free portion is parallel or antiparallel to the fixed portion, information can be stored by setting the orientation of the free portion. The information is later retrieved by sensing the orientation of the free portion. Such magnetic memory devices are well known in the art.
Writing to magnetic memory cells can be accomplished by sending a spin-polarized write current through the memory device where the angular momentum carried by the spin-polarized current can change the magnetic state of the free portion. One of ordinary skill in the art understands that such a current can either be directly driven through the memory cell or can be the result of applying one or more voltages, where the applied voltages result in the desired current. Depending on the direction of the current through the memory cell, the resulting magnetization of the free portion will either be parallel or antiparallel to the fixed portion. If the parallel orientation represents a logic “0”, the antiparallel orientation may represent a logic “1”, or vice versa. Thus, the direction of write current flow through the memory cell determines whether the memory cell is written to a first state or a second state. Such memory devices are often referred to as spin torque transfer memory devices. In such memories, the magnitude of the write current is typically greater than the magnitude of a read current used to sense the information stored in the memory cells.
In an array of magnetoresistive memory cells, each memory cell is often coupled to a corresponding selection transistor that allows each memory cell to be individually selected for access. The selection transistor for each memory cell is coupled in series with the memory cell between a source line and a bit line. A word line is coupled to the gate of the selection transistor, thereby controlling current flow through the series circuit based on the voltages applied to the source and bit lines. In some instances, a higher word line voltage is needed in order to enable an appropriate amount of current flow through the memory cell that is sufficient to cause the free portion within the memory cell to change its magnetic orientation.
Because a magnetic random access memory (“MRAM”) may include thousands or millions of memory cells, reducing the amount of area needed for each memory cell and the associated access circuitry for the memory cell can provide for increased memory cell density. Higher memory cell density allows for greater data storage capacity in the MRAM. One technique that has been applied to reduce the area required for the associated access circuitry for the memory cells is to use local source lines. Such local source lines allow the memory cells to be packed more densely, but can result in additional power consumption. Therefore, it is desirable to provide techniques for supporting such local source lines that alleviate some of the disadvantages associated with additional power consumption while promoting proper memory operation.